Events

Public defence in Micro- and Nanoelectronic Circuit Design, M.Sc.(Tech.) Okko Järvinen

Time-based conversion techniques as a solution to the performance requirements of integrated radio receivers in modern wireless communications applications

M.Sc.(Tech.) Okko Järvinen will defend the thesis "Wideband Time-Based Data Converters" on 22 November 2022 at 12 (EET) in Aalto University School of Electrical Engineering, Department of Electronics and Nanoengineering, in lecture hall AS2, Maarintie 8, Espoo.

Opponent: Prof. Carsten Wulff, NTNU, Norway
Custos: Prof. Jussi Ryynänen, Aalto University School of Electrical Engineering, Department of Electronics and Nanoengineering

Thesis available for public display 10 days prior to the defence at: https://aaltodoc.aalto.fi/doc_public/eonly/riiputus/
Doctoral theses in the School of Electrical Engineering: https://aaltodoc.aalto.fi/handle/123456789/53

Public defence announcement:

Modern wireless communication applications enable significantly higher data rates, which in turn requires increasingly high-speed and wideband integrated radio receivers. Additionally, the energy efficiency of the integrated receivers is further emphasized in portable devices. Nanometer-scale semiconductor technologies allow digital circuit structures to operate with increased speed and energy efficiency. However, they simultaneously hinder the performance of conventional analog circuit structures present in the receivers.

This work explores time-based methods, which can replace conventional analog structures with mostly digital counterparts. The aim of the research has been to develop wideband time-based analog-to-digital (A/D) conversion techniques to be used in nanometer-scale CMOS processes. The work presents several time-based A/D-conversion techniques and two prototype IC implementations with measured results: 1) a time-to-digital converter based on a multi-phase phase reference achieving high linearity and picosecond-scale time resolution, 2) a time-based time-interleaved A/D-converter with 1-gigahertz bandwidth. The proposed converter architectures advance the research of time-based A/D-converters with fine time resolutions and high operating speeds.

Contact information of doctoral candidate:

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