Defence of doctoral thesis in the field of Micro- and Nanoelectronic Circuit Design, M.Sc.(Tech.) Yury Antonov

The title of the thesis is Multi-output Synthesizers for Integrated Transceivers

M.Sc.(Tech.) Yury Antonov will defend the thesis "Multi-output Synthesizers for Integrated Transceivers" on 11 March 2022 at 12 in Aalto University School of Electrical Engineering, Department of Electronics and Nanoengineering, in lecture hall AS1, Maarintie 8, Espoo, and online in Zoom.

Opponent: Prof. Atila Alvandpour, Linköping University, Sweden
Custos: Prof. Jussi Ryynänen, Aalto University School of Electrical Engineering, Department of Electronics and Nanoengineering

The public defense will be organized via remote technology. Follow defence:
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Thesis available for public display at:
Doctoral theses in the School of Electrical Engineering:

Press release:

Since invention of the telephone a lot has changed for end user over 1.5 centuries: from wealthy people's toy it became a basic commodity everyone has, from one-to-one dialogue tool it turned into mass streaming device for self-produced content, and it's not a big overstatement to say that people spend majority of their lives now in front of the smartphones.

This amazing evolution was based on collective advancements in mobile phones hardware as well as base stations infrastructure updates, altogether enabling miniaturization and providing higher data transfer (up to hundreds of Mbps), multiple wireless services (WiFi, BT, GPS, etc.), spatial filtering through antenna arrays and other improvements for the quality of service.  

Ever enhancing features of the mobile phone/base station need to be synchronized or clocked to set up specific carrier frequency and modulation scheme and therefore require advancements in the area. This thesis discusses hardware from clocking perspective and proposes concepts and implementations in the integrated circuit technologies, serving onchip circuits miniaturization and multiple onchip radios trends.

The thesis demonstrates that various onchip clocks can be generated for multiple-outputs scenario and in-situ calibrated for better individual clock quality. Wide-range clock delays can be produced on chip without bulky arrays of passive components, while clocking waveforms can be scaled in shape and frequency for paralleled RF front-ends in the modern telecommunications equipment.

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