Jussi Ryynänen
Department of Electronics and Nanoengineering

Jussi Ryynänen

Professor (Associate Professor)

Contact information

Postal address
Otakaari 5
Mobile phone
+358503841720
Full researcher profile
https://research.aalto.fi/...

Description

Research of Prof. Ryynänen is focused on developing integrated circuits on various applications. His group belongs to the Electronic Circuit Design (ECD) unit is recognized as one of the best in Europe. Research of RF, analog, and digital integrated circuits has been carried out in the Electronic Circuit Design unit already for decades and has strong network of collaborators and funding. The group has access to nanoscale IC tehnologies and hosts significant measurment infrastucture dedicated for IC measurements from complex DSP to millimeterwave circuits.

Current research interests include

  • Wireless transceivers
  • Time-based integrated circuits
  • Beam-steering and MIMO
  • Complex millimeter wave circuits
  • Integrated circuit-antenna codesign
  • RF DACs and ADCs

 

Areas of expertise

Integrated circuits Wireless Communications CMOS Radio Frequency Electronics

Honors and awards

Award or honor granted for a specific work
Department of Micro and Nanosciences
Jan 2012

Best paper award 2012 The Second International Conference on Advances in Cognitive Radio, France

Award or honor granted for a specific work
Department of Micro and Nanosciences
Jan 2011

Crowncom student paper award Crowncom, Japan

Award or honor granted for a specific work
Department of Micro and Nanosciences
Sep 2015

ECCTD Best student paper award ECCTD student paper award from [39] Y. Antonov, T. Tikka, K. Stadius and J. Ryynänen, "All-digital phase-locked loop in 40 nm CMOS for 5.8 Gbps serial link transmitter," Circuit Theory and Design (ECCTD), 2015 European Conference on, Trondheim, 2015, pp. 1-4.

Research groups

Jussi Ryynänen Group

Publications

Jussi Ryynänen Group, Department of Electronics and Nanoengineering

A Delay-Based LO Phase-Shifting Generator for a 2-5GHz Beamsteering Receiver in 28nm CMOS

Publishing year: 2019 49th European Solid-State Device Research Conference and 45th European Solid-State Circuits Conference
Jussi Ryynänen Group, Department of Electronics and Nanoengineering

A Blocker-Tolerant Two-Stage Harmonic-Rejection RF Front-End

Publishing year: 2019 IEEE Radio Frequency Integrated Circuits Symposium
Department of Electronics and Nanoengineering, Jussi Ryynänen Group

A 1.5-1.9-GHz all-digital tri-phasing transmitter with an integrated multilevel class-D power amplifier achieving 100-MHz RF bandwidth

Publishing year: 2019 IEEE Journal of Solid-State Circuits
Department of Electronics and Nanoengineering, Jussi Ryynänen Group

Full-Duplex OFDM Radar With LTE and 5G NR Waveforms: Challenges, Solutions, and Measurements

Publishing year: 2019 IEEE Transactions on Microwave Theory and Techniques
Jussi Ryynänen Group, Department of Electronics and Nanoengineering

Low-Power, Transient Enhanced Output Capacitor-Less Low-Dropout Regulator with Two Compensation Amplifiers

Publishing year: 2019
Department of Electronics and Nanoengineering, Jussi Ryynänen Group

A Configurable Hysteresis Comparator for Asynchronous Sigma-Delta Modulators

Publishing year: 2018 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)
Department of Electronics and Nanoengineering, Aalto University, Jussi Ryynänen Group

Tri-Phasing Modulation for Efficient and Wideband Radio Transmitters

Publishing year: 2018 IEEE Transactions on Circuits and Systems I: Regular Papers
Department of Electronics and Nanoengineering, Jussi Ryynänen Group

A 30-dBm class-D power amplifier with on/off logic for an integrated tri-phasing transmitter in 28-nm CMOS

Publishing year: 2018 Proceedings of the 2018 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2018
Department of Electronics and Nanoengineering, Jussi Ryynänen Group

A Systematic Design Method for Direct Delta-Sigma Receivers

Publishing year: 2018 IEEE Transactions on Circuits and Systems I: Regular Papers
Department of Electronics and Nanoengineering, Jussi Ryynänen Group

A common-gate common-source low noise amplifier based RF front end with selective input impedance matching for blocker-resilient receivers

Publishing year: 2018 International Journal of Circuit Theory and Applications